ESD circuit tutorial and PCB design guidelines for withstanding ESD (static discharges).

Radio-Electronics blog recently had an item on electrostatic design principles.

I remember that being a challenge during my electronics design years at a medical analyzer company - the sensitive electrometer had to withstand a 15kV shock.  And it did with a circuit identical to that mentioned below and in the article.  The trick is to choose the right components, however!

"The need for ESD protection and design guidelines for ESD for electronics devices and electronics assemblies has never been greater. With the geometries within integrated circuits becoming much smaller, they have become much more susceptible to damage from ESD. In addition to this other components like capacitors and resistors that were traditionally not treated as static sensitive devices, SSDs have now become so small that they also need to be treated in the same way.

While manufacture, repair, servicing and maintenance need to be undertaken in a static free environment, part of the ESD protection can be incorporated into the design of the electronics equipment. Implementing ESD design guidelines into the circuits themselves will help make them more robust. Not only will this help during the manufacturing stages when sub-assemblies are exposed to any static that may be in the environment, but when in use, equipment must be able to withstand the levels of static that appear in everyday life.

ESD protection requirement

With electronics devices used in today's electronics equipment being susceptible to electrostatic discharge, it is necessary to employ ESD design guidelines that ensure that devices used will be protected against its effects. The ESD design guidelines and the protection used is of particular importance where any connections are on the periphery of the equipment and may be accessed via the user.

When accessing external ports, users will not take any precautions against ESD, if they even understand about it. Therefore it is necessary to provide full protection for any external ports that may exist.

Electronics devices manufactured today are often required to survive a discharge of 8kV contact discharge (i.e. where the 8 kV is discharged directly onto the pin via a metallic contact) or a 15 kV air discharge (where the 15 kV point is close to the pin and discharges across an air gap). While this is the aim, not all devices will survive this and in many cases the discharge may be greater than this. It is therefore wise to add additional protection.

ESD design methods

The key to the ESD design guidelines for protecting the devices on any external Input / Output (I / O) lines, is to prevent the voltage rising above a level that will damage the interface device. This may be achieved using a circuit that clamps the maximum voltages to just outside the maximum operating extremes. Typically this may be just above the rail voltage and just below the zero volt line.

A typical circuit that can be used for clamping voltages employs reverse biased diodes from the input line to the voltage rail and to ground. This ESD protection circuit must ensure that the voltage excursions on the input line are limited. The diodes must also have a low level of residual current, and the capacitance must be low to ensure that the frequency response / data rate and other input parameters are not impaired.

Diodes used for ESD protection

The operation of the circuit is very simple in that the diodes, D1 and D2 are reverse biased under normal operating conditions. However if a pulse occurs that raises the input voltage above the rail voltage the top diode, D1, will conduct. Similarly if the voltage falls below the ground voltage, the other diode, D2, will conduct. Using ordinary signal diodes, the maximum voltage excursions that might expected on the input line in the first analysis may be +0.5V above the rail and -0.5V below ground. However this is not always the case as seen below...."

See more here:  http://bit.ly/2c93lIk.